Design and Testing of Digital VLSI Circuits using Approximate Computing

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Several studies on the applications of Recognition, Mining, and Synthesis (RMS) have been undertaken in recent years. The tasks executed by these applications don’t require a golden answer or an outstanding numerical result. Instead, they must deliver products that are acceptable or sufficient in quality. These workloads have inherent application resilience or the capacity to deliver acceptable results even if a significant portion of their computations are executed in an imprecise or approximate manner. Intrinsic application resilience adds a whole new level to the optimization of computing platforms. However, the belief that every computation must be conducted with the same stringent idea of accuracy continues to govern the design of computing systems. With unrelenting demand for computing performance on one side and the power requirement from technology scaling on the other, it’s essential to delve into a new source of efficiency. Approximate Computing (AxC) is a new design method that takes advantage of the flexibility given by intrinsic application resilience to optimise hardware or software implementations that are more energy or performance efficient. Several AxC techniques have been effectively developed for system architecture, software, storage elements, arithmetic circuits, and simulation in the last decade. In this thesis, we focus on Approximate Arithmetic Circuits, particularly Approximate Adder, which are the result of applying AxC techniques at the hardware level, and Approximate Testing, which is the process of approximating the conventional test procedure.
Supervisors: Deka, Jatindra Kumar and Biswas, Santosh
Department of Computer Science and Engineering