DC-DC Converters with High Step-up/Step-down Conversion Ratio and Reduced Voltage Stress

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dc.contributor.authorBiswas, Mriganka
dc.date.accessioned2023-02-02T12:33:26Z
dc.date.accessioned2023-10-20T07:26:42Z
dc.date.available2023-02-02T12:33:26Z
dc.date.available2023-10-20T07:26:42Z
dc.date.issued2021
dc.descriptionSupervisors: Majhi, Somanath and Nemade, Harshal Ben_US
dc.description.abstractThe thesis presents the design and implementation of DC-DC converters with improved step-up/step-down conversion ratio and reduced voltage stress. Firstly, a high step-down buck converter (HSDBuC) is proposed to produce a lower output voltage at a sufficiently higher duty ratio compared to the conventional buck converter (CBuC). The step-down voltage conversion ratio is modified by a series-parallel transition of two identical capacitors of a switch-capacitor cell. The cell consists of two parallel switches and two cross-connected identical capacitors. These identical capacitors are charged in series and discharged in parallel by producing a lower output voltage compared to CBuC at the same duty ratio. The modified voltage conversion ratio reduces the ripples in inductor currents and output voltage. The proposed HSDBuC utilizes a dual winding coupled inductor to further reduce the ripples in inductor currents and output voltage. The voltage and current stresses of the semiconductor devices employed in HSDBuC are less.en_US
dc.identifier.otherROLL NO.146102032
dc.identifier.urihttps://gyan.iitg.ac.in/handle/123456789/2285
dc.language.isoenen_US
dc.relation.ispartofseriesTH-2863;
dc.subjectDC-DC Converteren_US
dc.subjectStep-up Converteren_US
dc.subjectStep-down Converteren_US
dc.subjectCoupled Inductoren_US
dc.subjectCurrent Rippleen_US
dc.subjectVoltage Rippleen_US
dc.subjectVoltage Stressen_US
dc.subjectEfficiencyen_US
dc.titleDC-DC Converters with High Step-up/Step-down Conversion Ratio and Reduced Voltage Stressen_US
dc.typeThesisen_US
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PhD Theses (Electronics and Electrical Engineering)