DC-DC Converters with High Step-up/Step-down Conversion Ratio and Reduced Voltage Stress
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The thesis presents the design and implementation of DC-DC converters with improved step-up/step-down conversion ratio and reduced voltage stress. Firstly, a high step-down buck converter (HSDBuC) is proposed to produce a lower output voltage at a sufficiently higher duty ratio compared to the conventional buck converter (CBuC). The step-down voltage conversion ratio is modified by a series-parallel transition of two identical capacitors of a switch-capacitor cell. The cell consists of two parallel switches and two cross-connected identical capacitors. These identical capacitors are charged in series and discharged in parallel by producing a lower output voltage compared to CBuC at the same duty ratio. The modified voltage conversion ratio reduces the ripples in inductor currents and output voltage. The proposed HSDBuC utilizes a dual winding coupled inductor to further reduce the ripples in inductor currents and output voltage. The voltage and current stresses of the semiconductor devices employed in HSDBuC are less.
Supervisors: Majhi, Somanath and Nemade, Harshal B
DC-DC Converter, Step-up Converter, Step-down Converter, Coupled Inductor, Current Ripple, Voltage Ripple, Voltage Stress, Efficiency