Design of amplifiers and fabrication of high performance thin-film transistors using carbon nanotubes
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Date
2011
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Abstract
The work carried out in this thesis is divided into three parts. The first part discusses the study on carbon nanotubes (CNT) interconnects. The second part will be dealing with the modelling of CNT based transistors and design of analog circuits based on CNTs. The final part will present the fabricated thin film transistors based on single walled carbon nanotubes (SWCNTs). The study on the SWCNT interconnects is focused on the estimation of their magnetic inductance at various bias voltages. The analysis of magnetic inductance is carried out for the ground-signal-ground (GSG) configuration of SWCNT based interconnects having various dimensions and different percentage of metallic SWCNT (m-SWCNT) purities. The result indicates a variation in the loop inductance value as high as 34% for closely spaced semi-global interconnects. The study on the SWCNT transistor modelling aims to develop close-form equations for the drain current and drain to source voltage for CNT field effect transistor (CNFET) in terms of its dimensions. Although these proposed models are based on curve fitting method, they provide a quick first order numerical estimate of drain current and drain to source voltage of the CNFET.
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Supervisor: Roy P. Paily
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ELECTRONICS AND ELECTRICAL ENGINEERING