Design and Implementation of Lattice and Chaos based Post-Quantum Cryptography Algorithms
| dc.contributor.author | Paul, Bikram | |
| dc.date.accessioned | 2023-01-19T06:45:20Z | |
| dc.date.accessioned | 2023-10-20T07:27:07Z | |
| dc.date.available | 2023-01-19T06:45:20Z | |
| dc.date.available | 2023-10-20T07:27:07Z | |
| dc.date.issued | 2023 | |
| dc.description | Supervisor: Trivedi, Gaurav | en_US |
| dc.description.abstract | The achievements we have made in the field of varied technology have largely fueled modern human growth. Data and digital information based innovations are playing a major role in the accelerated growth. Personal and other important secret data are considered vital asset since historical time and have become prime focus for the current information and digital generation. Various rudimentary data encryption methodologies, such as, Caesar cipher, Scytale cipher, Vigen`ere cipher, Steganography, Enigma machine were introduced in the past. With the invention of digital computers, to introduce greater resilience in security newer symmetric (e.g. DES, AES etc.) and asymmetric (e.g. RSA, ECC etc.) cryptography schemes are formulated in late ′90s, which are acting as the primary protector of data against adversary and unwanted intruders. | en_US |
| dc.identifier.other | ROLL NO.146102038 | |
| dc.identifier.uri | https://gyan.iitg.ac.in/handle/123456789/2258 | |
| dc.language.iso | en | en_US |
| dc.relation.ispartofseries | TH-2920; | |
| dc.subject | Hardware Security | en_US |
| dc.subject | FPGA | en_US |
| dc.subject | SoC Accelerator | en_US |
| dc.subject | Lattice Homomorphic PQC | en_US |
| dc.subject | Chaos PQC | en_US |
| dc.subject | Low Power IoT | en_US |
| dc.subject | Quantum Computing | en_US |
| dc.title | Design and Implementation of Lattice and Chaos based Post-Quantum Cryptography Algorithms | en_US |
| dc.type | Thesis | en_US |
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