Design, Modeling and Optimization of Large-Scale Disaggregated Memory Systems
dc.contributor.author | Puri, Amit | |
dc.date.accessioned | 2025-10-09T06:24:52Z | |
dc.date.issued | 2024 | |
dc.description | Supervisors: Jose, John and Venkatesh, Tamarapalli | |
dc.description.abstract | This thesis discusses the challenges faced by traditional server systems in meeting the increasing memory requirements of modern server workloads, leading to the emergence of Disaggregated Memory Systems (DMS) as a solution. The traditional systems struggle with scaling up memory capacity, often resulting in under-utilization of onboard memory resources and inflexible hardware refresh cycles in data centers. DMS offer a more flexible approach by allowing memory to be attached as remote memory modes/pools connected to compute nodes through a high-speed coherent interconnect. This setup enables on-demand memory allocation, eliminates scalability and under-utilization issues, and facilitates independent upgrading of server memory resources, thereby reducing the total cost of ownership. However, the adoption of DMS introduces new system-level design and architecture challenges topped up by the absence of an architectural simulator for performance evaluation. Memory disaggregation increases the Average Memory Access Time (AMAT) due to the network interconnect between compute nodes and remote memory pools, potentially impacting application performance, especially in large-scale configurations. The thesis aims to address these challenges by proposing various system-level and architectural optimizations to reduce AMAT in DMS. It includes building an architectural simulator for performance evaluation, exploring hot-page migration techniques, studying memory bandwidth contention, and investigating network resource allocation to provide Quality of Service (QoS) to different applications. The experiments conducted with various workloads demonstrate that the proposed mechanisms can significantly enhance application performance in large-scale DMS deployments. | |
dc.identifier.other | ROLL NO.186101102 | |
dc.identifier.uri | https://gyan.iitg.ac.in/handle/123456789/2996 | |
dc.language.iso | en | |
dc.relation.ispartofseries | TH-3561 | |
dc.title | Design, Modeling and Optimization of Large-Scale Disaggregated Memory Systems | |
dc.type | Thesis |
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